Fin isolation structure for FinFET and method of forming the same
US10714395B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 15, 2019 |
| Grant date | Jul 14, 2020 |
| Priority date | — |
| Expiry date | Feb 15, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/31053
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device structure is provided. The semiconductor device structure includes a substrate having adjacent first and second fins protruding from the substrate, an isolation feature between and adjacent to the first fin and the second fin, and a fin isolation structure between the first fin and the second fin. The fin isolation structure includes a first insulating layer partially embedded in the isolation feature, a second insulating layer having sidewall surfaces and a bottom surface that are covered by the first insulating layer, a first capping layer covering the second insulating layer and having sidewall surfaces that are covered by the first insulating layer, and a second capping layer having sidewall surfaces and a bottom surface that are covered by the first capping layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.