Integrated circuit package assemblies including a chip recess

US10714455B2 · kind B2 · utility

Assignee

• Intel IP Corporation · US

Inventors

• Georg Seidemann · Landshut, DE
• Klaus Reingruber · Langquaid, DE

Key dates

• Filing date: Dec 10, 2018
• Grant date: Jul 14, 2020
• Expiry date: Dec 10, 2038

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L2924/15321
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

IC package assemblies including a molding compound in which an IC chip surface is recessed relative to the molding compound. Thickness of the IC chip may be reduced relative to its thickness during the molding process. Another IC chip, heat spreader, etc. may then occupy the resultant recess framed by the molding compound to achieve a fine stacking pitch. In some embodiments, a package-on-package (PoP) assembly includes a center-molded IC chip flip-chip-bonded to a first package substrate. A second substrate to which a second IC chip is flip-chip bonded is then electrically coupled to the first substrate by through-molding vias. Within the PoP assembly, the second IC chip may be disposed back-to-back with the center-molded IC chip so as to occupy the recess framed by the molding compound.