Transistors with oxide liner in drift region
US10714594B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 15, 2017 |
| Grant date | Jul 14, 2020 |
| Priority date | — |
| Expiry date | Nov 15, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/307
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method to fabricate a transistor includes implanting dopants into a semiconductor to form a drift layer having majority carriers of a first type; etching a trench into the semiconductor; thermally growing an oxide liner into and on the trench and the drift layer; depositing an oxide onto the oxide liner on the trench to form a shallow trench isolation region; implanting dopants into the semiconductor to form a drain region in contact with the drift layer and having majority carriers of the first type; implanting dopants into the semiconductor to form a body region having majority carriers of a second type; forming a gate oxide over a portion of the drift layer and the body region; forming a gate over the gate oxide; and implanting dopants into the body region to form a source region having majority carriers of the first type.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.