High-speed analog-to-digital converter
US10715165B2 · kind B2 · utility
5Cited by
2References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 14, 2018 |
| Grant date | Jul 14, 2020 |
| Priority date | — |
| Expiry date | Nov 14, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L49/15
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
There is disclosed in one example a communication apparatus, including: an analog data source; a digital communication interface; and an analog-to-digital converter (ADC) circuit assembly, including: an analog sample input; an input clock to provide frequency fin; a time-interleaved front end to interleave n samples of the analog sample input; and an ADC array including n successive-approximation register (SAR) ADCs, the SAR ADCs including self-clocked comparators and configured to operate at a frequency no less than
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.