Coarse-fine gain-tracking loop and method of operating
US10715169B1 · kind B1 · utility
12Cited by
15References
20Claims
0Family size
Assignee
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Key dates
| Filing date | May 21, 2019 |
| Grant date | Jul 14, 2020 |
| Priority date | — |
| Expiry date | May 21, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/742
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A receiver gain tracking loop utilizing two Digital-to-Analog Converters (DACs) and methods for operating the gain tracking loop are provided. The gain tracking circuit includes a signal detector for detecting at least one signal and outputting a detected signal; a digital integrator connected in series to the signal detector for integrating the detected signal in the digital domain; two DACs connected in parallel to the digital integrator; and an analog summing element for summing the first digital output and the second digital output of the DACs producing a combined output.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.