Inventor · Gatineau, QC, CA

Sadok Aouini

51Patents
8h-index
39Co-inventors
74Inventor score

Filing activity: Oct 20, 2008 → Jun 3, 2024

Most-cited inventions

PatentTitleAreaCited byStatus
US10715169B1 Coarse-fine gain-tracking loop and method of operating Electricity 12 Active
US10425099B1 Extremely-fine resolution sub-ranging current mode Digital-Analog-Converter using Sigma-Delta modulators Electricity 11 Active
US10063367B1 Optical clock recovery using feedback phase rotator with non-linear compensation Electricity 11 Active
US10715155B1 Apparatus and methods for digital phase locked loop with analog proportional control function Electricity 11 Active
US10979059B1 Successive approximation register analog to digital converter based phase-locked loop with programmable range Electricity 10 Active
US8855215B2 Phase/frequency synthesis using periodic sigma-delta modulated bit-stream techniques Electricity 9 Active
US10826514B1 Noise-shaping enhanced gated ring oscillator based analog-to-digital converters Electricity 9 Active
US10903841B1 Apparatus and methods for high frequency clock generation Electricity 9 Active
US10243671B1 Clock recovery circuits, systems and implementation for increased optical channel density Electricity 8 Active
US10320374B2 Fine resolution high speed linear delay element Electricity 8 Active
US10965300B1 High bandwidth under-sampled successive approximation register analog to digital converter with nonlinearity minimization Electricity 8 Active
US10848164B1 Apparatus and methods for digital fractional phase locked loop with a current mode low pass filter Electricity 7 Active
US10536303B1 Quarter-rate charge-steering decision feedback equalizer (DFE) taps Electricity 7 Active
US10680585B2 Techniques and circuits for time-interleaved injection locked voltage controlled oscillators with jitter accumulation reset Electricity 6 Active
US10805064B1 Built-in jitter loading and state of polarization generation to characterize optical transceivers Electricity 6 Active
US10554453B1 Quarter-rate charge-steering decision feedback equalizer (DFE) Electricity 6 Active
US10985900B1 Estimating clock phase error based on channel conditions Electricity 6 Active
US10187197B2 Optical clock recovery using feedback phase rotator with non-linear compensation Electricity 6 Active
US10931292B1 High resolution successive approximation register analog to digital converter with factoring and background clock calibration Electricity 6 Active
US10855380B2 Clock recovery circuits, systems and implementation for increased optical channel density Electricity 5 Active
US8849882B2 Generation of an analog Gaussian noise signal having predetermined characteristics Electricity 5 Active
US10749536B1 High-order phase tracking loop with segmented proportional and integral controls Electricity 5 Active
US10281523B2 Techniques and circuits for on-chip jitter and phase noise measurement in a digital test environment Electricity 5 Active
US9787466B2 High order hybrid phase locked loop with digital scheme for jitter suppression Electricity 4 Active
US11012081B2 Apparatus and methods for digital phase locked loop with analog proportional control function Electricity 2 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.