Method and framework to dynamically split a testbench into concurrent simulatable multi-processes and attachment to parallel processes of an accelerated platform
US10719644B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 29, 2018 |
| Grant date | Jul 21, 2020 |
| Priority date | — |
| Expiry date | Jul 29, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/398
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The independent claims of this patent signify a concise description of embodiments. Each component of a testbench configured to test a DUT is associated at compile time with a different hardware transactor. The testbench is partitioned at compile time into a plurality of independent partitioned testbenches, where each independent partitioned testbench comprises at least one component of the testbench. At run time, each of the plurality of partitioned testbenches is simulated in parallel. The simulating of a partitioned testbench includes execution of its at least one component on its at least one associated hardware transactor using the hardware emulation system. This Abstract is not intended to limit the scope of the claims.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.