Scattering parameter calibration to a semiconductor layer
US10725138B2 · kind B2 · utility
0Cited by
6References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 15, 2016 |
| Grant date | Jul 28, 2020 |
| Priority date | — |
| Expiry date | Sep 3, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2223/6683
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A compound may include a set of integrated circuits. An integrated circuit, of the set of integrated circuits, may include calibration standards integrated at a silicon layer of the integrated circuit. The integrated circuit may be included in a package, and a calibration standard, of the calibration standards, may be available to at least one port of a set of ports of the integrated circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.