Systems and methods for efficient power state transitions
US10725677B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 19, 2017 |
| Grant date | Jul 28, 2020 |
| Priority date | — |
| Expiry date | Oct 12, 2038 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory device may be configured to leverage memory resources of a host computing device to efficiently transition between different power states. In some embodiments, the memory device stores resume data within a host memory buffer (HMB) before transitioning to a low-power state, and uses the resume data stored within the HMB to resume operation from the low-power state. The memory device may be configured to pre-populate the HMB with resume data prior to transitioning to the low-power state. In some embodiments, the disclosed memory device is configured to gradually resume from the low-power state, which may comprise resuming services of the memory device in the order such services are required during the resume process.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.