Semiconductor nanowire fabrication
US10727051B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 6, 2018 |
| Grant date | Jul 28, 2020 |
| Priority date | — |
| Expiry date | Dec 6, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/02647
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Methods are provided for fabricating semiconductor nanowires on a substrate. A nanowire template is formed on the substrate. The nanowire template defines an elongate tunnel which extends, laterally over the substrate, between an opening in the template and a seed surface. The seed surface is exposed to the tunnel and of an area up to about 2×104 nm2. The semiconductor nanowire is selectively grown, via said opening, in the template from the seed surface. The area of the seed surface is preferably such that growth of the nanowire proceeds from a single nucleation point on the seed surface. There is also provided a method for fabricating a plurality of semiconductor nanowires on a substrate and a semiconductor nanowire and substrate structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.