Complimentary metal-oxide-semiconductor circuit having transistors with different threshold voltages and method of manufacturing the same
US10727297B2 · kind B2 · utility
1Cited by
8References
16Claims
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Key dates
| Filing date | Nov 10, 2016 |
| Grant date | Jul 28, 2020 |
| Priority date | — |
| Expiry date | Nov 10, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/85
Abstract
A complimentary metal-oxide-semiconductor (CMOS) circuit including: a substrate; and a plurality of field-effect transistors on the substrate. Each of the field-effect transistors includes: a plurality of contacts; a source connected to one of the contacts; a drain connected to another one of the contacts; a gate; and a spacer between the gate and the contacts. The spacer of one of the field-effect transistors has a larger airgap than the spacer of another one of the field-effect transistors.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.