Metal routing with flexible space formed using self-aligned spacer patterning
US10734275B2 · kind B2 · utility
1Cited by
8References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 26, 2019 |
| Grant date | Aug 4, 2020 |
| Priority date | — |
| Expiry date | Dec 26, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76807
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method includes forming a hard mask over a target layer, performing a treatment on a first portion of the hard mask to form a treated portion, with a second portion of the hard mask left untreated as an untreated portion. The method further includes subjecting both the treated portion and the untreated portion of the hard mask to etching, in which the untreated portion is removed as a result of the etching, and the treated portion remains after the etching. A layer underlying the hard mask is etched, and the treated portion of the hard mask is used as a part of an etching mask in the etching.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.