Hsiang-Wei Liu
49Patents
5h-index
37Co-inventors
69Inventor score
Filing activity: Oct 2, 1996 → Jul 26, 2023
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US10020261B2 | Split rail structures located in adjacent metal layers | Electricity | 29 | Active |
| US10269715B2 | Split rail structures located in adjacent metal layers | Electricity | 28 | Active |
| US5824457A | Use of WEE (wafer edge exposure) to prevent polyimide contamination | Emerging Cross-Sectional Technologies | 18 | Expired |
| US9607881B2 | Insulator void aspect ratio tuning by selective deposition | Electricity | 10 | Active |
| US6001681A | Method to reduce the depth of a buried contact trench by using a thin split polysilicon thickness | Electricity | 7 | Expired |
| US10290580B2 | Hybrid copper structure for advance interconnect usage | Electricity | 5 | Active |
| US9837354B2 | Hybrid copper structure for advance interconnect usage | Electricity | 5 | Active |
| US10147609B2 | Semiconductor epitaxy bordering isolation structure | Electricity | 4 | Active |
| US6819556B2 | Server system and vibration-free extractable hard disc drive assembly thereof | Physics | 4 | Expired |
| US9219494B2 | Dual mode analog to digital converter | Electricity | 3 | Active |
| US10930551B2 | Methods for fabricating a low-resistance interconnect | Electricity | 2 | Active |
| US11729969B1 | Semiconductor device and method of operating the same | Electricity | 2 | Active |
| US10522353B2 | Semiconductor epitaxy bordering isolation structure | Electricity | 2 | Active |
| US10529617B2 | Metal routing with flexible space formed using self-aligned spacer patterning | Electricity | 2 | Active |
| US9583434B2 | Metal line structure and method | Electricity | 2 | Active |
| US10534273B2 | Multi-metal fill with self-aligned patterning and dielectric with voids | Electricity | 2 | Active |
| US10957540B2 | Semiconductor epitaxy bordering isolation structure | Electricity | 1 | Active |
| US10658296B2 | Dielectric film for semiconductor fabrication | Electricity | 1 | Active |
| US11302570B2 | Interconnect structure and method for forming the same | Electricity | 1 | Active |
| US10957580B2 | Metal routing with flexible space formed using self-aligned spacer patterning | Electricity | 1 | Active |
| US10734275B2 | Metal routing with flexible space formed using self-aligned spacer patterning | Electricity | 1 | Active |
| US8779959B1 | Method of dynamic element matching and an apparatus thereof | Electricity | 1 | Active |
| US7307838B2 | Hard disc drive carrier | Physics | 1 | Expired |
| US11107725B2 | Interconnect structure and manufacturing method for the same | Electricity | 0 | Active |
| US11860550B2 | Multi-metal fill with self-aligned patterning and dielectric with voids | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.