Method of manufacturing chip-on-chip structure comprising sinterted pillars
US10734346B2 · kind B2 · utility
1Cited by
11References
15Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 17, 2019 |
| Grant date | Aug 4, 2020 |
| Priority date | — |
| Expiry date | Jan 17, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/351
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Sintered connection structures and methods of manufacture are disclosed. The method includes placing a powder on a substrate and sintering the powder to form a plurality of pillars. The method further includes repeating the placing and sintering steps until the plurality of pillars reach a predetermined height. The method further includes forming a solder cap on the plurality of pillars. The method further includes joining the substrate to a board using the solder cap.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.