Multilayer circuit board structure and manufacturing method thereof
US10736215B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | May 23, 2019 |
| Grant date | Aug 4, 2020 |
| Priority date | — |
| Expiry date | May 23, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2203/085
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A multilayer circuit board structure includes a first multilayer circuit board and a second multilayer circuit board. The first multilayer circuit board includes a first patterned circuit layer and a first dummy circuit layer. The first dummy circuit layer surrounds the first patterned circuit layer. The second multilayer circuit board is disposed on the first multilayer circuit board, and includes a second patterned circuit layer and a second dummy circuit layer surrounding the second patterned circuit layer. The first patterned circuit layer is bonded to the second patterned circuit layer and the first dummy circuit layer is bonded to the second dummy circuit layer. A hollow space is defined between the first multilayer circuit board and the second multilayer circuit board.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.