High voltage fringe-effect capacitor
US10741330B1 · kind B1 · utility
1Cited by
11References
15Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 2, 2019 |
| Grant date | Aug 11, 2020 |
| Priority date | — |
| Expiry date | Apr 2, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01G4/30
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A multilayer chip capacitor includes electrodes comprised of numerous, closely spaced conductive layers. Adjacent conductive layers are essentially non-overlapping, so that fringe capacitance between opposing electrodes provides substantially all of the capacitance. The conductive layers may be shaped to form a non-planer boundary between electrodes. An additional high frequency integrated capacitor is formed from external electrode plates. The non-planar electrode boundary principle is also applied to discoidal capacitors in the form of a non-concentric electrode boundary.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.