Nanosheet CMOS device and method of forming
US10741558B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 19, 2019 |
| Grant date | Aug 11, 2020 |
| Priority date | — |
| Expiry date | Mar 19, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/0212
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of forming a semiconductor device includes providing a fin extruding from a substrate, the fin having first epitaxial layers alternating with second epitaxial layers, the first epitaxial layers including a first semiconductor material, the second epitaxial layers including a second semiconductor material different from the first semiconductor material; etching sidewalls of at least one of the second epitaxial layers in a channel region of the fin, such that a width of the at least one of the second epitaxial layers in the channel region after etching is smaller than a width of the first epitaxial layers contacting the at least one of the second epitaxial layers; and forming a gate stack over of the fin, the gate stack engaging both the first epitaxial layers and the second epitaxial layers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.