Measuring height difference in patterns on semiconductor wafers
US10748272B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 17, 2018 |
| Grant date | Aug 18, 2020 |
| Priority date | — |
| Expiry date | Jul 23, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06T2207/30148
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An improved technique for determining height difference in patterns provided on semiconductor wafers uses real measurements (e.g., measurements from SEM images) and a height difference determination model. In one version of the model, a measurable variable of the model is expressed in terms of a function of a change in depth of shadow (i.e. relative brightness), wherein the depth of shadow depends on the height difference as well as width difference between two features on a semiconductor wafer. In another version of the model, the measurable variable is expressed in terms of a function of a change of a measured distance between two characteristic points on the real image of a periodic structure with respect to a change in a tilt angle of a scanning electron beam.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.