SRAM memory with improved end-of-read triggering
US10748604B2 · kind B2 · utility
0Cited by
2References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 16, 2019 |
| Grant date | Aug 18, 2020 |
| Priority date | — |
| Expiry date | Jan 16, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/418
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Circuit for triggering the end of a read operation, for a SRAM memory device, comprising:
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.