Dynamic power analysis with per-memory instance activity customization
US10748635B2 · kind B2 · utility
0Cited by
6References
18Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 22, 2018 |
| Grant date | Aug 18, 2020 |
| Priority date | — |
| Expiry date | Mar 22, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2029/5006
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present disclosure relates to a device including a built-in-self-test (BIST) circuit configured to run a BIST pattern in a loop mode on a memory which is customized for activity factors corresponding to a programmable number of operations, the BIST circuit being further configured to measure dynamic power on a supply while running the BIST pattern in the loop mode on the memory.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.