Method of manufacturing a curved semiconductor die
US10748957B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 18, 2019 |
| Grant date | Aug 18, 2020 |
| Priority date | — |
| Expiry date | Apr 18, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2119/18
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method of manufacturing a curved semiconductor die includes: designing a semiconductor die design by conducting finite element analysis of an initial semiconductor die design having a partial spherical curvature, the initial semiconductor die design including a shape of a semiconductor die and a location and shape of a slit in the semiconductor die; when a size of a gap at the slit in the curved semiconductor die is outside a tolerance, modifying the initial semiconductor die design to provide a revised semiconductor die design and conducting another finite element analysis thereof; when the size of the gap at the slit in the curved semiconductor die is within the tolerance, manufacturing a microfabrication mask utilizing the initial semiconductor die design or the revised semiconductor die design having the size of the gap within the tolerance; forming a semiconductor die by utilizing the microfabrication mask; and curving the semiconductor die.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.