Semiconductor device having a multi-layer diffusion barrier
US10749004B2 · kind B2 · utility
2Cited by
1References
18Claims
0Family size
Assignee
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Key dates
| Filing date | Jun 15, 2018 |
| Grant date | Aug 18, 2020 |
| Priority date | — |
| Expiry date | Sep 26, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L23/53295
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device includes a metal layer, an insulating layer disposed above the metal layer, and a multi-layer diffusion barrier disposed on the metal layer between the metal layer and the insulating layer. The multi-layer diffusion barrier includes a first material layer including a metallic nitride and a second material layer including a metallic oxide.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.