Control of pre-fetch traffic
US10754778B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Apr 17, 2017 |
| Grant date | Aug 25, 2020 |
| Priority date | — |
| Expiry date | May 20, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/602
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Methods and systems for improved control of traffic generated by a processor are described. In an embodiment, when a device generates a pre-fetch request for a piece of data or an instruction from a memory hierarchy, the device includes a pre-fetch identifier in the request. This identifier flags the request as a pre-fetch request rather than a non-pre-fetch request, such as a time-critical request. Based on this identifier, the memory hierarchy can then issue an abort response at times of high traffic which suppresses the pre-fetch traffic, as the pre-fetch traffic is not fulfilled by the memory hierarchy. On receipt of an abort response, the device deletes at least a part of any record of the pre-fetch request and if the data/instruction is later required, a new request is issued at a higher priority than the original pre-fetch request.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.