Efficient two-stage object detection scheme for embedded device
US10755114B1 · kind B1 · utility
2Cited by
1References
20Claims
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Key dates
| Filing date | Apr 4, 2019 |
| Grant date | Aug 25, 2020 |
| Priority date | — |
| Expiry date | Apr 4, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06V10/809
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An apparatus comprises a detector and a processor. The processor may be configured to perform a two-stage object detection process utilizing the detector circuit. The detector circuit may be configured to implement a simple detection stage and a complex detection stage. In the simple detection stage, a first type of object detection is applied to each image in a search space and a number of candidates are identified by applying a first non-maximum suppression technique. In the complex detection stage, a second type of object detection is applied to the candidates identified by the simple detection stage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.