Leslie D. Kohn
103Patents
26h-index
45Co-inventors
90Inventor score
Filing activity: Apr 15, 1980 → Dec 20, 2019
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US7880776B2 | High resolution zoom: a novel digital zoom for digital video camera | Electricity | 181 | Active |
| US5155816A | Pipelined apparatus and method for controlled loading of floating point data in a microprocessor | Physics | 157 | Expired |
| US6938119B2 | DRAM power management | Emerging Cross-Sectional Technologies | 140 | Expired |
| US5081698A | Method and apparatus for graphics display data manipulation | Physics | 125 | Expired |
| US5634068A | Packet switched cache coherent multiprocessor system | Physics | 119 | Expired |
| US5734874A | Central processing unit with integrated graphics functions | Physics | 118 | Expired |
| US5241636A | Method for parallel instruction execution in a computer | Physics | 103 | Expired |
| US5692197A | Method and apparatus for reducing power consumption in a computer network without sacrificing performance | Physics | 82 | Expired |
| US5657472A | Memory transaction execution system and method for multiprocessor system having independent parallel transaction queues associated with each processor | Physics | 74 | Expired |
| US9918102B1 | Inter-prediction candidate selection in a mode decision | Electricity | 63 | Active |
| US5745729A | Methods and apparatuses for servicing load instructions | Physics | 58 | Expired |
| US5157388A | Method and apparatus for graphics data interpolation | Physics | 57 | Expired |
| US5938756A | Central processing unit with integrated graphics functions | Physics | 55 | Expired |
| US7209996B2 | Multi-core multi-thread processor | Emerging Cross-Sectional Technologies | 48 | Expired |
| US5265227A | Parallel protection checking in an address translation look-aside buffer | Physics | 44 | Expired |
| US6006312A | Cachability attributes of virtual addresses for optimizing performance of virtually and physically indexed caches in maintaining multiply aliased physical addresses | Physics | 43 | Expired |
| US7248585B2 | Method and apparatus for a packet classifier | Emerging Cross-Sectional Technologies | 39 | Expired |
| US7392399B2 | Methods and systems for efficiently integrating a cryptographic co-processor | Electricity | 36 | Expired |
| US5204828A | Bus apparatus having hold registers for parallel processing in a microprocessor | Physics | 35 | Expired |
| US5706463A | Cache coherent computer system that minimizes invalidation and copyback operations | Physics | 35 | Expired |
| US6512550B1 | Motion compensated de-interlacing | Electricity | 31 | Expired |
| US5101484A | Method and apparatus for implementing an iterative program loop by comparing the loop decrement with the loop value | Physics | 30 | Expired |
| US5802575A | Hit bit for indicating whether load buffer entries will hit a cache when they reach buffer head | Physics | 29 | Expired |
| US5276847A | Method for locking and unlocking a computer address | Physics | 29 | Expired |
| US6501799B1 | Dual-prime motion estimation engine | Electricity | 27 | Expired |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.