Semiconductor chip and semiconductor package including the same
US10756062B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 20, 2019 |
| Grant date | Aug 25, 2020 |
| Priority date | — |
| Expiry date | Mar 20, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/15311
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor chip includes a semiconductor substrate, a through electrode, an inter-mediation pad, an upper pad, and a rewiring line. The semiconductor substrate includes a first surface that is an active surface and a second surface that is opposite to the first surface. The through electrode penetrates the semiconductor substrate and is disposed in at least one column in a first direction in a center portion of the semiconductor substrate. The inter-mediation pad is disposed in at least one column in the first direction in an edge portion of the second surface. The upper pad is disposed on the second surface and connected to the through electrode. The rewiring line is disposed on the second surface and connects the inter-mediation pad to the upper pad.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.