Integrated circuit device and method of manufacturing the same
US10756195B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 2, 2018 |
| Grant date | Aug 25, 2020 |
| Priority date | — |
| Expiry date | Nov 2, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/017
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Provided are an integrated circuit device and a method of manufacturing the same. The integrated circuit device includes: a semiconductor substrate; a device isolation layer defining an active region of the semiconductor substrate; a gate insulating layer on the active region; a gate stack on the gate insulating layer; a spacer on a sidewall of the gate stack; and an impurity region provided on both sides of the gate stack, wherein the gate stack includes a metal carbide layer and a metal layer on the metal carbide layer, wherein the metal carbide layer includes a layer having a carbon content of about 0.01 at % to about 15 at %.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.