Patent · US Active

Multi-channel network-on-a-chip

US10761925B2 · kind B2 · utility

1Cited by
38References
21Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMar 24, 2015
Grant dateSep 1, 2020
Priority date
Expiry dateOct 8, 2035

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F2201/845
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

In at least one embodiment of the disclosure, a method includes detecting an error in a local memory shared by redundant computing modules executing in delayed lockstep. The method includes pausing execution in the redundant computing modules and handling the error of the local memory. The method includes resuming execution in delayed lockstep of the redundant computing modules in response to the handling of the error.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.