Semiconductor processing station
US10763140B2 · kind B2 · utility
1Cited by
1References
7Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 14, 2018 |
| Grant date | Sep 1, 2020 |
| Priority date | — |
| Expiry date | Oct 14, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/67303
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor processing station including a central transfer chamber, a load lock chamber disposed adjacent to the central transfer chamber, and a cooling stage disposed adjacent to the load lock chamber and the central transfer chamber is provided. The load lock chamber is adapted to contain a wafer carrier including a plurality of wafers. The central transfer chamber communicates between the cooling stage and the load lock chamber to transfer a wafer of the plurality of wafers between the cooling stage and the load lock chamber.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.