Semiconductor element and methods for manufacturing the same
US10766769B2 · kind B2 · utility
0Cited by
19References
17Claims
0Family size
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Key dates
| Filing date | Mar 22, 2018 |
| Grant date | Sep 8, 2020 |
| Priority date | — |
| Expiry date | Dec 4, 2038 |
Classification
- Technology area (CPC B)Performing Operations; Transporting
- CPC primaryB81B2207/07
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
A semiconductor element includes a processed substrate arrangement including a processed semiconductor substrate and a metallization layer arrangement on a main surface of the processed semiconductor substrate. The semiconductor element further includes a passivation layer arranged at an outer border of the processed substrate arrangement.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.