Patent · US Active

Index based memory access using single instruction multiple data unit

US10776118B2 · kind B2 · utility

0Cited by

5References

17Claims

0Family size

Assignee

International Business Machines Corporation · US

Inventors

Heiner Giefers · Thalwil, CH
Raphael Polig · Dietikon, CH
Jan Van Lunteren · Thalwil, CH

Key dates

Filing date	Sep 9, 2016
Grant date	Sep 15, 2020
Priority date	—
Expiry date	Nov 17, 2036

Classification

Technology area (CPC G)Physics
CPC primaryG11C5/02
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

A computing system comprising a central processing unit (CPU), a memory processor and a memory device comprising a data array and an index array. The computing system is configured to store data lines comprising data elements in the data array and to store index lines comprising a plurality of memory indices in the index array. The memory indices indicate memory positions of data elements in the data array with respect to a start address of the data array. There is further provided a related computer implemented method and a related computer program product.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.