Raphael Polig
27Patents
3h-index
27Co-inventors
55Inventor score
Filing activity: Jul 11, 2011 → Sep 3, 2019
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US9558156B1 | Sparse matrix multiplication using a single field programmable gate array module | Physics | 61 | Active |
| US10685082B2 | Sparse matrix multiplication using a single field programmable gate array module | Physics | 17 | Active |
| US9703573B1 | Interposer for dynamic mapping of API calls | Physics | 5 | Active |
| US9557975B2 | Adaptable and extensible runtime and system for heterogeneous computer systems | Emerging Cross-Sectional Technologies | 3 | Active |
| US11150926B2 | Native code generation for cloud services | Physics | 2 | Active |
| US8918749B2 | Integrated circuit schematics having imbedded scaling information for generating a design instance | Physics | 2 | Active |
| US8587990B2 | Global bit line restore by most significant bit of an address line | Physics | 2 | Active |
| US8631376B2 | Method and system for generating a placement layout of a VLSI circuit design | Physics | 1 | Active |
| US9779061B2 | Iterative refinement apparatus | Physics | 1 | Active |
| US9582472B2 | Conjugate gradient solvers for linear systems | Physics | 1 | Active |
| US8964493B2 | Defective memory column replacement with load isolation | Physics | 1 | Active |
| US10430325B2 | Precision data access using differential data | Physics | 0 | Active |
| US11907828B2 | Deep neural network on field-programmable gate array | Physics | 0 | Active |
| US9858056B1 | Accelerated content analytics based on a hierarchical data-flow-graph representation | Physics | 0 | Active |
| US11515005B2 | Interactive-aware clustering of stable states | Physics | 0 | Active |
| US10970449B2 | Learning framework for software-hardware model generation and verification | Physics | 0 | Active |
| US9575930B2 | Conjugate gradient solvers for linear systems | Physics | 0 | Active |
| US10776118B2 | Index based memory access using single instruction multiple data unit | Physics | 0 | Active |
| US10198646B2 | Hardware compilation of cascaded grammars | Physics | 0 | Active |
| US11275713B2 | Bit-serial linear algebra processor | Physics | 0 | Active |
| US9557976B2 | Adaptable and extensible runtime and system for heterogeneous computer systems | Emerging Cross-Sectional Technologies | 0 | Active |
| US10025754B2 | Linear FE system solver with dynamic multi-grip precision | Physics | 0 | Active |
| US9384823B2 | SRAM array comprising multiple cell cores | Physics | 0 | Active |
| US10803346B2 | Hardware compilation of cascaded grammars | Physics | 0 | Active |
| US10430326B2 | Precision data access using differential data | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.