Semiconductor device and dicing method
US10784165B2 · kind B2 · utility
0Cited by
3References
7Claims
0Family size
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Key dates
| Filing date | Mar 12, 2018 |
| Grant date | Sep 22, 2020 |
| Priority date | — |
| Expiry date | Mar 12, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/35121
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
According to an embodiment, a semiconductor device includes a silicon substrate, a device layer, and a lower layer. The device layer is formed on an upper surface of the silicon substrate. The lower layer is formed on a lower surface of the silicon substrate and has a side surface connecting to a side surface of the silicon substrate. At least a pair of side surfaces of the semiconductor device has a curved shape widening from an upper side toward a lower side.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.