Methods for reducing defects in semiconductor plug in three-dimensional memory device

US10784279B2 · kind B2 · utility

Assignee

• YANGTZE MEMORY TECHNOLOGIES CO., LTD. · CN

Inventors

• Fandong Liu · 红钢城街道, CN
• Wenyu Hua · Hubei, CN
• Jia He · Yangshuo, CN
• Linchen Wu · 红钢城街道, CN
• Yue Qiang Pu · 红钢城街道, CN
• Zhiliang Xia · 红钢城街道, CN

Key dates

• Filing date: Nov 17, 2018
• Grant date: Sep 22, 2020
• Expiry date: Dec 8, 2038

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L21/02189
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

Embodiments of 3D memory devices with a dielectric etch stop layer and methods for forming the same are disclosed. In an example, a 3D memory device includes a substrate, a dielectric etch stop layer disposed on the substrate, a memory stack disposed on the dielectric etch stop layer and including a plurality of interleaved conductor layers and dielectric layers, and a plurality of memory strings each extending vertically through the memory stack and including a selective epitaxial growth (SEG) plug in a bottom portion of the memory string. The SEG plug is disposed on the substrate.