Storage device buffer in system memory space
US10795605B2 · kind B2 · utility
1Cited by
3References
19Claims
0Family size
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Key dates
| Filing date | Apr 20, 2018 |
| Grant date | Oct 6, 2020 |
| Priority date | — |
| Expiry date | Apr 20, 2038 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An information handling system may include a resistive memory buffer to supplement a system main memory unit of the information handling system. A processor of the information handling system may map the resistive memory buffer as system memory, along with the system main memory unit. The processor may use the system memory, including the resistive memory buffer and the system main memory unit in executing one or more applications. The resistive memory buffer may improve performance of the information handling system, such as during hibernation and wake-up processes and memory flush processes.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.