Method of manufacture of a semiconductor on insulator structure
US10796946B2 · kind B2 · utility
0Cited by
21References
26Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 7, 2019 |
| Grant date | Oct 6, 2020 |
| Priority date | — |
| Expiry date | Oct 7, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/31116
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method is provided for preparing a semiconductor-on-insulator structure comprising a multilayer dielectric layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.