Patent · US Active

Fin field-effect transistor device and method

US10797175B2 · kind B2 · utility

2Cited by
7References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJun 4, 2019
Grant dateOct 6, 2020
Priority date
Expiry dateJun 4, 2039

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D84/853
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

A method includes forming a first fin protruding above a substrate, the first fin having a PMOS region; forming a first gate structure over the first fin in the PMOS region; forming a first spacer layer over the first fin and the first gate structure; and forming a second spacer layer over the first spacer layer. The method further includes performing a first etching process to remove the second spacer layer from a top surface and sidewalls of the first fin in the PMOS region; performing a second etching process to remove the first spacer layer from the top surface and the sidewalls of the first fin in the PMOS region; and epitaxially growing a first source/drain material over the first fin in the PMOS region, the first source/drain material extending along the top surface and the sidewalls of the first fin in the PMOS region.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.