Performing local power gating in a processor
US10802567B2 · kind B2 · utility
1Cited by
25References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 21, 2017 |
| Grant date | Oct 13, 2020 |
| Priority date | — |
| Expiry date | Apr 2, 2038 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In an embodiment, the present invention includes an execution unit to execute instructions of a first type, a local power gate circuit coupled to the execution unit to power gate the execution unit while a second execution unit is to execute instructions of a second type, and a controller coupled to the local power gate circuit to cause it to power gate the execution unit when an instruction stream does not include the first type of instructions. Other embodiments are described and claimed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.