Patent · US Active

Parallel processing system runtime state reload

US10802929B2 · kind B2 · utility

2Cited by
9References
18Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMay 15, 2018
Grant dateOct 13, 2020
Priority date
Expiry dateOct 9, 2038

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F2201/82
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A parallel processing system includes at least three processors operating in parallel, state monitoring circuitry, and state reload circuitry. The state monitoring circuitry couples to the at least three parallel processors and is configured to monitor runtime states of the at least three parallel processors and identify a first processor of the at least three parallel processors having at least one runtime state error. The state reload circuitry couples to the at least three parallel processors and is configured to select a second processor of the at least three parallel processors for state reload, access a runtime state of the second processor, and load the runtime state of the second processor into the first processor. Monitoring and reload may be performed only on sub-systems of the at least three parallel processors. During reload, clocks and supply voltages of the processors may be altered. The state reload may relate to sub-systems.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.