Integrated circuit containing a decoy structure formed by an electrically insulated silicide sector
US10804222B2 · kind B2 · utility
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1References
4Claims
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Key dates
| Filing date | Jul 16, 2018 |
| Grant date | Oct 13, 2020 |
| Priority date | — |
| Expiry date | Jul 16, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D89/10
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An integrated circuit includes a substrate, an interconnection part, and an isolating region located between the substrate and the interconnection part. A decoy structure is located within the isolating region and includes a silicided sector which is electrically isolated from the substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.