Three-dimensional semiconductor memory device and method of fabricating the same
US10804363B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 19, 2019 |
| Grant date | Oct 13, 2020 |
| Priority date | — |
| Expiry date | Jun 19, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B43/50
Abstract
Disclosed are three-dimensional semiconductor memory devices and methods of fabricating the same. The three-dimensional semiconductor memory device comprises a substrate that includes a cell array region and a connection region, an electrode structure that includes a plurality of electrodes and a plurality of dielectric layers alternately stacked on the substrate and has a stepwise structure on the connection region, an etch stop pattern that covers the stepwise structure of the electrode structure. The electrode structure and the etch stop pattern extend in a first direction when viewed in plan. The electrode structure has a first width in a second direction intersecting the first direction. The etch stop pattern has a second width in the second direction. The second width is less than the first direction.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.