Neuromorphic core and chip traffic control
US10810488B2 · kind B2 · utility
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Key dates
| Filing date | Dec 20, 2016 |
| Grant date | Oct 20, 2020 |
| Priority date | — |
| Expiry date | Aug 21, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06N3/08
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Systems and methods may include neuromorphic traffic control, such as between cores on a chip or between cores on different chips. The neuromorphic traffic control may include a plurality of routers organized in a mesh to transfer messages; and a plurality of neuron cores connected to the plurality of routers, the neuron cores in the plurality of neuron cores to advance in discrete time-steps, send spike messages to other neuron cores in the plurality of neuron cores during a time-step, and send barrier messages.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.