Patent · US Active

Semiconductor device with deep trench isolation and trench capacitor

US10811543B2 · kind B2 · utility

3Cited by
11References
10Claims
0Family size

Assignee

Inventors

Key dates

Filing dateDec 26, 2018
Grant dateOct 20, 2020
Priority date
Expiry dateDec 26, 2038

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D84/813
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

A semiconductor device with an isolation structure and a trench capacitor, each formed using a single resist mask for etching corresponding first and second trenches of different widths and different depths, with dielectric liners formed on the trench sidewalls and polysilicon filling the trenches and deep doped regions surrounding the trenches, including conductive features of a metallization structure that connect the polysilicon of the isolation structure trench to the deep doped region to form an isolation structure.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.