Active matrix substrate
US10816865B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 13, 2017 |
| Grant date | Oct 27, 2020 |
| Priority date | — |
| Expiry date | Mar 27, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG02F2201/123
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
Provided is an active matrix substrate provided with a substrate (1), a peripheral circuit that includes a first oxide semiconductor thin-film transistor (TFT) (101), a plurality of second oxide semiconductor TFTs (102) disposed in a display area, and a first inorganic insulating layer (11) covering the plurality of second oxide semiconductor TFTs (102), the first oxide semiconductor TFT (101) having a lower gate electrode (3A), a gate insulating layer (4), an oxide semiconductor (5A) disposed so as to face the lower gate electrode with the gate insulating layer interposed therebetween, a source electrode (7A) and a drain electrode (8A), and an upper gate electrode (BG) disposed on the oxide semiconductor (5A) with an insulating layer that includes the first inorganic insulating layer (11) interposed therebetween, and furthermore having, on the upper gate electrode (BG), a second inorganic insulating layer (17) covering the first oxide semiconductor TFT (101).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.