Patent · US Active

Directed and interconnected grid dataflow architecture

US10817344B2 · kind B2 · utility

0Cited by

27References

22Claims

0Family size

Assignee

Next Silicon Ltd · IL

Inventors

Elad RAZ · Ramat Gan, IL
Ilan TAYARI · Tzur Hadassa, IL

Key dates

Filing date	Sep 13, 2018
Grant date	Oct 27, 2020
Priority date	—
Expiry date	Feb 1, 2039

Classification

Technology area (CPC H)Electricity
CPC primaryH04L2012/5672
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

A computing grid including an interconnect network including input ports and output ports; a plurality of egress ports; a plurality of configurable data routing junctions; a plurality of logical elements interconnected using the plurality of configurable data routing junctions; a plurality of ingress ports. In an embodiment at least one compute graph is projected onto the computing grid as a configuration of various elements of the computing grid.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.