Semiconductor memory device

US10818691B2 · kind B2 · utility

Assignee

• TOSHIBA MEMORY CORPORATION · JP

Inventors

• Toshifumi Minami · Kawasaki, JP
• Atsuhiro Sato · Yokohama, JP
• Keisuke Yonehama · Yokohama, JP
• Yasuyuki Baba · Yokohama, JP
• Hiroshi Shinohara · Nagano, JP
• Hideyuki Kamata · Ota, JP
• Teppei HIGASHITSUJI · Yokohama, JP

Key dates

• Filing date: Sep 13, 2019
• Grant date: Oct 27, 2020
• Expiry date: Sep 13, 2039

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D30/693

Abstract

A semiconductor memory device includes a conducting layer and an insulating layer that are disposed above a semiconductor substrate, a plurality of pillars that extend in a direction which crosses a surface of the semiconductor substrate, and a plate that is disposed between the plurality of pillars and extends in the same direction as the pillars. A surface of the plate, which faces the pillars, has convex portions and non-convex portions.