Flash memory block retirement policy
US10824527B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 5, 2019 |
| Grant date | Nov 3, 2020 |
| Priority date | — |
| Expiry date | Jul 5, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/0483
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Devices and techniques for a flash memory block retirement policy are disclosed herein. In an example embodiment, a first memory block is removed from service in response to encountering a read error in the first memory block that exceeds a first error threshold. Recoverable data is copied from the first memory block to a second memory block. During each of multiple iterations, the first memory block is erased and programmed, and each page of the first memory block is read. In response to none of the pages exhibiting a read error that exceeds a second error threshold during the multiple iterations, the first memory block is returned to service.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.