Semiconductor structures
US10825690B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Jan 9, 2019 |
| Grant date | Nov 3, 2020 |
| Priority date | — |
| Expiry date | Jan 9, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor structure a base substrate and a sidewall spacer layer formed on the base substrate. The sidewall spacer layer includes a plurality of first sidewall spacer layers and a plurality of second sidewall spacer layers spaced apart from each other. At least one sidewall of a second sidewall spacer layer of the plurality of second sidewall spacer layers is formed on a first sidewall spacer layer of the plurality of first sidewall spacer layers. The plurality of first sidewall spacer layers has a thickness greater than the plurality of second sidewall spacer layers, based on a surface of the base substrate. The plurality of first sidewall spacer layers has a material structure different than the plurality of second sidewall spacer layers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.