Underbump metallization dimension variation with improved reliability
US10825789B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 26, 2019 |
| Grant date | Nov 3, 2020 |
| Priority date | — |
| Expiry date | Aug 26, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/351
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
One embodiment of a packaged semiconductor device includes: a redistributed layer (RDL) structure formed over an active side of a semiconductor die embedded in mold compound, the RDL structure includes a plurality of solder ball pads that in turn includes: a set of first solder ball pads located on a front side of the packaged semiconductor device within a footprint of the semiconductor die, and a set of second solder ball pads located on the front side of the packaged semiconductor device outside of the footprint of the semiconductor die, each first solder ball pad includes a first center portion having a first diameter measured between opposite outer edges of the first center portion, each second solder ball pad includes a second center portion having a second diameter measured between opposite outer edges of the second center portion, and the first diameter is smaller than the second diameter.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.