Semiconductor integrated circuit
US10825812B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 24, 2018 |
| Grant date | Nov 3, 2020 |
| Priority date | — |
| Expiry date | Aug 8, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/038
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor integrated circuit includes: a first well region of a first conductivity type; a second well region of a second conductivity type provided in an upper portion of the first well region; a first current suppression layer of a second conductivity type being provided to be separated from the first well region in a lower portion of a base-body of the second conductivity type directly under the first well region and having an impurity concentration higher than that of the base-body; and a second current suppression layer of the first conductivity type provided under the first current suppression layer so as to be exposed from a bottom surface of the base-body.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.